Added OC options for PRIZM CG10/20 similar to one of CG50/G90+E
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CppOutRun.layout
292
CppOutRun.layout
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@ -2,152 +2,6 @@
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@ -175,4 +29,150 @@
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353
src/clock.cc
353
src/clock.cc
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@ -7,27 +7,51 @@
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#include <gint/clock.h>
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#define FLLFRQ_default 0x00004384
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#define FRQCR_default 0x0F011112
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#define FLLFRQ_default_CG50 0x00004384
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#define FRQCR_default_CG50 0x0F011112
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#define CS0BCR_default_CG50 0x36DA0400 // CG50
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#define CS2BCR_default_CG50 0x36DA3400 // CG50
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#define CS3BCR_default_CG50 0x36DB4400 // CG50
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#define CS4BCR_default_CG50 0x36DB0400
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#define CS5aBCR_default_CG50 0x17DF0400
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#define CS5bBCR_default_CG50 0x17DF0400
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#define CS6aBCR_default_CG50 0x34D30200
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#define CS6bBCR_default_CG50 0x34D30200
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#define CS0WCR_default_CG50 0x000003C0 // CG50
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#define CS2WCR_default_CG50 0x000003C0 // CG50
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#define CS3WCR_default_CG50 0x000024D1 // CG50
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#define CS4WCR_default_CG50 0x00000540
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#define CS5aWCR_default_CG50 0x000203C1
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#define CS5bWCR_default_CG50 0x000203C1
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#define CS6aWCR_default_CG50 0x000302C0
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#define CS6bWCR_default_CG50 0x000302C0
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//#define SDCR_default 0x00000A08
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#define FLLFRQ_default_CG10_20 0x00004384
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#define FRQCR_default_CG10_20 0x0F102203
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#define CS0BCR_default_CG10_20 0x24920400
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#define CS2BCR_default_CG10_20 0x24923400
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#define CS3BCR_default_CG10_20 0x24924400
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#define CS4BCR_default_CG10_20 0x36DB0400
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#define CS5aBCR_default_CG10_20 0x15140400
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#define CS5bBCR_default_CG10_20 0x15140400
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#define CS6aBCR_default_CG10_20 0x34D30200
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#define CS6bBCR_default_CG10_20 0x34D30200
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#define CS0WCR_default_CG10_20 0x000001C0
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#define CS2WCR_default_CG10_20 0x00000140
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#define CS3WCR_default_CG10_20 0x000024D0
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#define CS4WCR_default_CG10_20 0x00000540
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#define CS5aWCR_default_CG10_20 0x00010240
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#define CS5bWCR_default_CG10_20 0x00010240
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#define CS6aWCR_default_CG10_20 0x000302C0
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#define CS6bWCR_default_CG10_20 0x000302C0
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#define CS0BCR_default 0x36DA0400 // CG50
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#define CS2BCR_default 0x36DA3400 // CG50
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#define CS3BCR_default 0x36DB4400 // CG50
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#define CS4BCR_default 0x36DB0400
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#define CS5aBCR_default 0x17DF0400
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||||
#define CS5bBCR_default 0x17DF0400
|
||||
#define CS6aBCR_default 0x34D30200
|
||||
#define CS6bBCR_default 0x34D30200
|
||||
|
||||
#define CS0WCR_default 0x000003C0 // CG50
|
||||
#define CS2WCR_default 0x000003C0 // CG50
|
||||
#define CS3WCR_default 0x000024D1 // CG50
|
||||
#define CS4WCR_default 0x00000540
|
||||
#define CS5aWCR_default 0x000203C1
|
||||
#define CS5bWCR_default 0x000203C1
|
||||
#define CS6aWCR_default 0x000302C0
|
||||
#define CS6bWCR_default 0x000302C0
|
||||
#define SDCR_default 0x00000A08
|
||||
|
||||
#define PLL_32x 0b011111 //
|
||||
#define PLL_26x 0b011001 //
|
||||
|
|
@ -37,6 +61,7 @@
|
|||
#define DIV_4 0b0001 // 1/4
|
||||
#define DIV_8 0b0010 // 1/8
|
||||
#define DIV16 0b0011 // 1/16
|
||||
#define DIV32 0b0100 // 1/32
|
||||
|
||||
#define WAIT18 0b1011
|
||||
|
||||
|
|
@ -149,30 +174,30 @@ static overclock_level current_clock_state = -1;
|
|||
bool overclock_config_changed = false;
|
||||
|
||||
|
||||
void SetOCDefault( void )
|
||||
void SetOCDefault_CG50( void )
|
||||
{
|
||||
BSC.CS0WCR.WR = WAIT18;
|
||||
|
||||
CPG.FLLFRQ.lword = FLLFRQ_default;
|
||||
CPG.FRQCR.lword = FRQCR_default;
|
||||
CPG.FLLFRQ.lword = FLLFRQ_default_CG50;
|
||||
CPG.FRQCR.lword = FRQCR_default_CG50;
|
||||
|
||||
CPG.FRQCR.KICK = 1 ;
|
||||
while((CPG.LSTATS & 1)!=0)
|
||||
|
||||
BSC.CS0BCR.lword = CS0BCR_default;
|
||||
BSC.CS0WCR.lword = CS0WCR_default;
|
||||
BSC.CS2BCR.lword = CS2BCR_default;
|
||||
BSC.CS2WCR.lword = CS2WCR_default;
|
||||
BSC.CS3BCR.lword = CS3BCR_default;
|
||||
BSC.CS3WCR.lword = CS3WCR_default;
|
||||
BSC.CS0BCR.lword = CS0BCR_default_CG50;
|
||||
BSC.CS0WCR.lword = CS0WCR_default_CG50;
|
||||
BSC.CS2BCR.lword = CS2BCR_default_CG50;
|
||||
BSC.CS2WCR.lword = CS2WCR_default_CG50;
|
||||
BSC.CS3BCR.lword = CS3BCR_default_CG50;
|
||||
BSC.CS3WCR.lword = CS3WCR_default_CG50;
|
||||
|
||||
if ( BSC.CS3WCR.A3CL == 1 ) SDMR3_CL2 = 0; else SDMR3_CL3 = 0;
|
||||
|
||||
BSC.CS5ABCR.lword = CS5aBCR_default;
|
||||
BSC.CS5AWCR.lword = CS5aWCR_default;
|
||||
BSC.CS5ABCR.lword = CS5aBCR_default_CG50;
|
||||
BSC.CS5AWCR.lword = CS5aWCR_default_CG50;
|
||||
}
|
||||
|
||||
void SetOCPtuneF2( void )
|
||||
void SetOCPtuneF2_CG50( void )
|
||||
{
|
||||
BSC.CS0WCR.WR = WAIT18;
|
||||
|
||||
|
|
@ -185,17 +210,17 @@ void SetOCPtuneF2( void )
|
|||
BSC.CS0BCR.lword = 0x24920400;
|
||||
BSC.CS0WCR.lword = 0x00000340;
|
||||
BSC.CS2BCR.lword = 0x24923400;
|
||||
BSC.CS2WCR.lword = CS2WCR_default;
|
||||
BSC.CS2WCR.lword = CS2WCR_default_CG50;
|
||||
BSC.CS3BCR.lword = 0x24924400;
|
||||
BSC.CS3WCR.lword = CS3WCR_default;
|
||||
BSC.CS3WCR.lword = CS3WCR_default_CG50;
|
||||
|
||||
if ( BSC.CS3WCR.A3CL == 1 ) SDMR3_CL2 = 0; else SDMR3_CL3 = 0;
|
||||
|
||||
BSC.CS5ABCR.lword = CS5aBCR_default;
|
||||
BSC.CS5AWCR.lword = CS5aWCR_default;
|
||||
BSC.CS5ABCR.lword = CS5aBCR_default_CG50;
|
||||
BSC.CS5AWCR.lword = CS5aWCR_default_CG50;
|
||||
}
|
||||
|
||||
void SetOCPtuneF3( void )
|
||||
void SetOCPtuneF3_CG50( void )
|
||||
{
|
||||
BSC.CS0WCR.WR = WAIT18;
|
||||
|
||||
|
|
@ -208,17 +233,17 @@ void SetOCPtuneF3( void )
|
|||
BSC.CS0BCR.lword = 0x24920400;
|
||||
BSC.CS0WCR.lword = 0x00000240;
|
||||
BSC.CS2BCR.lword = 0x24923400;
|
||||
BSC.CS2WCR.lword = CS2WCR_default;
|
||||
BSC.CS2WCR.lword = CS2WCR_default_CG50;
|
||||
BSC.CS3BCR.lword = 0x24924400;
|
||||
BSC.CS3WCR.lword = CS3WCR_default;
|
||||
BSC.CS3WCR.lword = CS3WCR_default_CG50;
|
||||
|
||||
if ( BSC.CS3WCR.A3CL == 1 ) SDMR3_CL2 = 0; else SDMR3_CL3 = 0;
|
||||
|
||||
BSC.CS5ABCR.lword = CS5aBCR_default;
|
||||
BSC.CS5AWCR.lword = CS5aWCR_default;
|
||||
BSC.CS5ABCR.lword = CS5aBCR_default_CG50;
|
||||
BSC.CS5AWCR.lword = CS5aWCR_default_CG50;
|
||||
}
|
||||
|
||||
void SetOCPtuneF4( void )
|
||||
void SetOCPtuneF4_CG50( void )
|
||||
{
|
||||
BSC.CS0WCR.WR = WAIT18;
|
||||
|
||||
|
|
@ -232,14 +257,17 @@ void SetOCPtuneF4( void )
|
|||
BSC.CS0BCR.lword = 0x24920400;
|
||||
BSC.CS0WCR.lword = 0x000002C0;
|
||||
BSC.CS2BCR.lword = 0x24923400;
|
||||
BSC.CS2WCR.lword = CS2WCR_default;
|
||||
BSC.CS2WCR.lword = CS2WCR_default_CG50;
|
||||
BSC.CS3BCR.lword = 0x24924400;
|
||||
BSC.CS3WCR.lword = CS3WCR_default;
|
||||
BSC.CS5ABCR.lword = CS5aBCR_default;
|
||||
BSC.CS5AWCR.lword = CS5aWCR_default;
|
||||
BSC.CS3WCR.lword = CS3WCR_default_CG50;
|
||||
|
||||
if ( BSC.CS3WCR.A3CL == 1 ) SDMR3_CL2 = 0; else SDMR3_CL3 = 0;
|
||||
|
||||
BSC.CS5ABCR.lword = CS5aBCR_default_CG50;
|
||||
BSC.CS5AWCR.lword = CS5aWCR_default_CG50;
|
||||
}
|
||||
|
||||
void SetOCPtuneF5( void )
|
||||
void SetOCPtuneF5_CG50( void )
|
||||
{
|
||||
BSC.CS0WCR.WR = WAIT18;
|
||||
|
||||
|
|
@ -252,17 +280,203 @@ void SetOCPtuneF5( void )
|
|||
BSC.CS0BCR.lword = 0x24920400;
|
||||
BSC.CS0WCR.lword = 0x00000440;
|
||||
BSC.CS2BCR.lword = 0x24923400;
|
||||
BSC.CS2WCR.lword = CS2WCR_default;
|
||||
BSC.CS2WCR.lword = CS2WCR_default_CG50;
|
||||
BSC.CS3BCR.lword = 0x24924400;
|
||||
BSC.CS3WCR.lword = CS3WCR_default;
|
||||
BSC.CS3WCR.lword = CS3WCR_default_CG50;
|
||||
|
||||
if ( BSC.CS3WCR.A3CL == 1 ) SDMR3_CL2 = 0; else SDMR3_CL3 = 0;
|
||||
|
||||
BSC.CS5ABCR.lword = CS5aBCR_default;
|
||||
BSC.CS5AWCR.lword = CS5aWCR_default;
|
||||
BSC.CS5ABCR.lword = CS5aBCR_default_CG50;
|
||||
BSC.CS5AWCR.lword = CS5aWCR_default_CG50;
|
||||
}
|
||||
|
||||
|
||||
void SetOCDefault_CG10_20( void )
|
||||
{
|
||||
BSC.CS0WCR.WR = WAIT18;
|
||||
|
||||
CPG.FLLFRQ.lword = FLLFRQ_default_CG10_20;
|
||||
CPG.FRQCR.lword = FRQCR_default_CG10_20;
|
||||
|
||||
CPG.FRQCR.KICK = 1 ;
|
||||
while((CPG.LSTATS & 1)!=0)
|
||||
|
||||
BSC.CS0BCR.lword = CS0BCR_default_CG10_20;
|
||||
BSC.CS0WCR.lword = CS0WCR_default_CG10_20;
|
||||
BSC.CS2BCR.lword = CS2BCR_default_CG10_20;
|
||||
BSC.CS2WCR.lword = CS2WCR_default_CG10_20;
|
||||
BSC.CS3BCR.lword = CS3BCR_default_CG10_20;
|
||||
BSC.CS3WCR.lword = CS3WCR_default_CG10_20;
|
||||
|
||||
if ( BSC.CS3WCR.A3CL == 1 ) SDMR3_CL2 = 0; else SDMR3_CL3 = 0;
|
||||
|
||||
BSC.CS5ABCR.lword = CS5aBCR_default_CG10_20;
|
||||
BSC.CS5AWCR.lword = CS5aWCR_default_CG10_20;
|
||||
}
|
||||
|
||||
void SetOCPtuneF2_CG10_20( void )
|
||||
{
|
||||
BSC.CS0WCR.WR = WAIT18;
|
||||
|
||||
CPG.FLLFRQ.lword = 0x00004000+900;
|
||||
CPG.FRQCR.lword = (PLL_32x<<24)+(DIV_8<<20)+(DIV16<<12)+(DIV16<<8)+DIV32;
|
||||
|
||||
CPG.FRQCR.KICK = 1 ;
|
||||
while((CPG.LSTATS & 1)!=0)
|
||||
|
||||
BSC.CS0BCR.lword = 0x04900400;
|
||||
BSC.CS0WCR.lword = 0x00000140;
|
||||
BSC.CS2BCR.lword = 0x04903400;
|
||||
BSC.CS2WCR.lword = 0x000100C0;
|
||||
BSC.CS3BCR.lword = CS3BCR_default_CG10_20;
|
||||
BSC.CS3WCR.lword = CS3WCR_default_CG10_20;
|
||||
|
||||
if ( BSC.CS3WCR.A3CL == 1 ) SDMR3_CL2 = 0; else SDMR3_CL3 = 0;
|
||||
|
||||
BSC.CS5ABCR.lword = CS5aBCR_default_CG10_20;
|
||||
BSC.CS5AWCR.lword = CS5aWCR_default_CG10_20;
|
||||
}
|
||||
|
||||
void SetOCPtuneF3_CG10_20( void )
|
||||
{
|
||||
BSC.CS0WCR.WR = WAIT18;
|
||||
|
||||
CPG.FLLFRQ.lword = 0x00004000+900;
|
||||
CPG.FRQCR.lword = (PLL_32x<<24)+(DIV_4<<20)+(DIV_8<<12)+(DIV_8<<8)+DIV32;
|
||||
|
||||
CPG.FRQCR.KICK = 1 ;
|
||||
while((CPG.LSTATS & 1)!=0)
|
||||
|
||||
BSC.CS0BCR.lword = 0x24900400;
|
||||
BSC.CS0WCR.lword = 0x000002C0;
|
||||
BSC.CS2BCR.lword = 0x04903400;
|
||||
BSC.CS2WCR.lword = 0x000201C0;
|
||||
BSC.CS3BCR.lword = CS3BCR_default_CG10_20;
|
||||
BSC.CS3WCR.lword = CS3WCR_default_CG10_20;
|
||||
|
||||
if ( BSC.CS3WCR.A3CL == 1 ) SDMR3_CL2 = 0; else SDMR3_CL3 = 0;
|
||||
|
||||
BSC.CS5ABCR.lword = CS5aBCR_default_CG10_20;
|
||||
BSC.CS5AWCR.lword = CS5aWCR_default_CG10_20;
|
||||
}
|
||||
|
||||
void SetOCPtuneF4_CG10_20( void )
|
||||
{
|
||||
BSC.CS0WCR.WR = WAIT18;
|
||||
|
||||
CPG.FLLFRQ.lword = 0x00004000+900;
|
||||
CPG.FRQCR.lword = (PLL_32x<<24)+(DIV_4<<20)+(DIV_4<<12)+(DIV_4<<8)+DIV32;
|
||||
|
||||
CPG.FRQCR.KICK = 1 ;
|
||||
while((CPG.LSTATS & 1)!=0)
|
||||
|
||||
BSC.CS0BCR.lword = 0x44900400;
|
||||
BSC.CS0WCR.lword = 0x00000440;
|
||||
BSC.CS2BCR.lword = 0x04903400;
|
||||
BSC.CS2WCR.lword = 0x00040340;
|
||||
BSC.CS3BCR.lword = CS3BCR_default_CG10_20;
|
||||
BSC.CS3WCR.lword = CS3WCR_default_CG10_20;
|
||||
|
||||
if ( BSC.CS3WCR.A3CL == 1 ) SDMR3_CL2 = 0; else SDMR3_CL3 = 0;
|
||||
|
||||
BSC.CS5ABCR.lword = CS5aBCR_default_CG10_20;
|
||||
BSC.CS5AWCR.lword = CS5aWCR_default_CG10_20;
|
||||
}
|
||||
|
||||
void SetOCPtuneF5_CG10_20( void )
|
||||
{
|
||||
BSC.CS0WCR.WR = WAIT18;
|
||||
|
||||
CPG.FLLFRQ.lword = 0x00004000+900;
|
||||
CPG.FRQCR.lword = (PLL_26x<<24)+(DIV_2<<20)+(DIV_4<<12)+(DIV_4<<8)+DIV16;
|
||||
|
||||
CPG.FRQCR.KICK = 1 ;
|
||||
while((CPG.LSTATS & 1)!=0)
|
||||
|
||||
BSC.CS0BCR.lword = 0x34900400;
|
||||
BSC.CS0WCR.lword = 0x000003C0;
|
||||
BSC.CS2BCR.lword = 0x04903400;
|
||||
BSC.CS2WCR.lword = 0x000402C0;
|
||||
BSC.CS3BCR.lword = CS3BCR_default_CG10_20;
|
||||
BSC.CS3WCR.lword = CS3WCR_default_CG10_20;
|
||||
|
||||
if ( BSC.CS3WCR.A3CL == 1 ) SDMR3_CL2 = 0; else SDMR3_CL3 = 0;
|
||||
|
||||
BSC.CS5ABCR.lword = CS5aBCR_default_CG10_20;
|
||||
BSC.CS5AWCR.lword = CS5aWCR_default_CG10_20;
|
||||
}
|
||||
|
||||
|
||||
|
||||
overclock_level overclock_detect( void )
|
||||
{
|
||||
if(gint[HWCALC] == HWCALC_FXCG50)
|
||||
{
|
||||
|
||||
// OC_Default configuration
|
||||
if (CPG.FLLFRQ.lword == FLLFRQ_default_CG50 && CPG.FRQCR.lword == FRQCR_default_CG50 && BSC.CS0BCR.lword == CS0BCR_default_CG50 && BSC.CS0WCR.lword == CS0WCR_default_CG50 &&
|
||||
BSC.CS2BCR.lword == CS2BCR_default_CG50 && BSC.CS2WCR.lword == CS2WCR_default_CG50 && BSC.CS3BCR.lword == CS3BCR_default_CG50 && BSC.CS3WCR.lword == CS3WCR_default_CG50 &&
|
||||
BSC.CS5ABCR.lword == CS5aBCR_default_CG50 && BSC.CS5AWCR.lword == CS5aWCR_default_CG50 ) return OC_Default;
|
||||
|
||||
// OC_PtuneF2 configuration
|
||||
else if (CPG.FLLFRQ.lword == 0x00004000+900 && CPG.FRQCR.lword == (PLL_16x<<24)+(DIV_4<<20)+(DIV_8<<12)+(DIV_8<<8)+DIV_8 && BSC.CS0BCR.lword == 0x24920400 &&
|
||||
BSC.CS0WCR.lword == 0x00000340 && BSC.CS2BCR.lword == 0x24923400 && BSC.CS2WCR.lword == CS2WCR_default_CG50 && BSC.CS3BCR.lword == 0x24924400 &&
|
||||
BSC.CS3WCR.lword == CS3WCR_default_CG50 && BSC.CS5ABCR.lword == CS5aBCR_default_CG50 && BSC.CS5AWCR.lword == CS5aWCR_default_CG50 ) return OC_PtuneF2;
|
||||
|
||||
// OC_PtuneF3 configuration
|
||||
else if (CPG.FLLFRQ.lword == 0x00004000+900 && CPG.FRQCR.lword == (PLL_26x<<24)+(DIV_4<<20)+(DIV_8<<12)+(DIV_8<<8)+DIV_8 && BSC.CS0BCR.lword == 0x24920400 &&
|
||||
BSC.CS0WCR.lword == 0x00000240 && BSC.CS2BCR.lword == 0x24923400 && BSC.CS2WCR.lword == CS2WCR_default_CG50 && BSC.CS3BCR.lword == 0x24924400 &&
|
||||
BSC.CS3WCR.lword == CS3WCR_default_CG50 && BSC.CS5ABCR.lword == CS5aBCR_default_CG50 && BSC.CS5AWCR.lword == CS5aWCR_default_CG50) return OC_PtuneF3;
|
||||
|
||||
// OC_PtuneF4 configuration
|
||||
else if (CPG.FLLFRQ.lword == 0x00004000+900 && CPG.FRQCR.lword == (PLL_32x<<24)+(DIV_2<<20)+(DIV_4<<12)+(DIV_8<<8)+DIV16 && BSC.CS0BCR.lword == 0x24920400 &&
|
||||
BSC.CS0WCR.lword == 0x000002C0 && BSC.CS2BCR.lword == 0x24923400 && BSC.CS2WCR.lword == CS2WCR_default_CG50 && BSC.CS3BCR.lword == 0x24924400 &&
|
||||
BSC.CS3WCR.lword == CS3WCR_default_CG50 && BSC.CS5ABCR.lword == CS5aBCR_default_CG50 && BSC.CS5AWCR.lword == CS5aWCR_default_CG50) return OC_PtuneF4;
|
||||
|
||||
// OC_PtuneF5 configuration
|
||||
else if (CPG.FLLFRQ.lword == 0x00004000+900 && CPG.FRQCR.lword == (PLL_26x<<24)+(DIV_2<<20)+(DIV_4<<12)+(DIV_4<<8)+DIV_8 && BSC.CS0BCR.lword == 0x24920400 &&
|
||||
BSC.CS0WCR.lword == 0x00000440 && BSC.CS2BCR.lword == 0x24923400 && BSC.CS2WCR.lword == CS2WCR_default_CG50 && BSC.CS3BCR.lword == 0x24924400 &&
|
||||
BSC.CS3WCR.lword == CS3WCR_default_CG50 && BSC.CS5ABCR.lword == CS5aBCR_default_CG50 && BSC.CS5AWCR.lword == CS5aWCR_default_CG50) return OC_PtuneF5;
|
||||
|
||||
// Not recognized
|
||||
else return OC_Undefined;
|
||||
|
||||
}
|
||||
else if(gint[HWCALC] == HWCALC_PRIZM)
|
||||
{
|
||||
|
||||
// OC_Default configuration
|
||||
if (CPG.FLLFRQ.lword == FLLFRQ_default_CG10_20 && CPG.FRQCR.lword == FRQCR_default_CG10_20 && BSC.CS0BCR.lword == CS0BCR_default_CG10_20 && BSC.CS0WCR.lword == CS0WCR_default_CG10_20 &&
|
||||
BSC.CS2BCR.lword == CS2BCR_default_CG10_20 && BSC.CS2WCR.lword == CS2WCR_default_CG10_20 && BSC.CS3BCR.lword == CS3BCR_default_CG10_20 && BSC.CS3WCR.lword == CS3WCR_default_CG10_20 &&
|
||||
BSC.CS5ABCR.lword == CS5aBCR_default_CG10_20 && BSC.CS5AWCR.lword == CS5aWCR_default_CG10_20 ) return OC_Default;
|
||||
|
||||
// OC_PtuneF2 configuration
|
||||
else if (CPG.FLLFRQ.lword == 0x00004000+900 && CPG.FRQCR.lword == (PLL_32x<<24)+(DIV_8<<20)+(DIV16<<12)+(DIV16<<8)+DIV32 && BSC.CS0BCR.lword == 0x04900400 &&
|
||||
BSC.CS0WCR.lword == 0x00000140 && BSC.CS2BCR.lword == 0x04903400 && BSC.CS2WCR.lword == 0x000100C0 && BSC.CS3BCR.lword == CS3BCR_default_CG10_20 &&
|
||||
BSC.CS3WCR.lword == CS3WCR_default_CG10_20 && BSC.CS5ABCR.lword == CS5aBCR_default_CG10_20 && BSC.CS5AWCR.lword == CS5aWCR_default_CG10_20 ) return OC_PtuneF2;
|
||||
|
||||
// OC_PtuneF3 configuration
|
||||
else if (CPG.FLLFRQ.lword == 0x00004000+900 && CPG.FRQCR.lword == (PLL_32x<<24)+(DIV_4<<20)+(DIV_8<<12)+(DIV_8<<8)+DIV32 && BSC.CS0BCR.lword == 0x24900400 &&
|
||||
BSC.CS0WCR.lword == 0x000002C0 && BSC.CS2BCR.lword == 0x04903400 && BSC.CS2WCR.lword == 0x000201C0 && BSC.CS3BCR.lword == CS3BCR_default_CG10_20 &&
|
||||
BSC.CS3WCR.lword == CS3WCR_default_CG10_20 && BSC.CS5ABCR.lword == CS5aBCR_default_CG10_20 && BSC.CS5AWCR.lword == CS5aWCR_default_CG10_20 ) return OC_PtuneF3;
|
||||
|
||||
// OC_PtuneF4 configuration
|
||||
else if (CPG.FLLFRQ.lword == 0x00004000+900 && CPG.FRQCR.lword == (PLL_32x<<24)+(DIV_4<<20)+(DIV_4<<12)+(DIV_4<<8)+DIV32 && BSC.CS0BCR.lword == 0x44900400 &&
|
||||
BSC.CS0WCR.lword == 0x00000440 && BSC.CS2BCR.lword == 0x04903400 && BSC.CS2WCR.lword == 0x00040340 && BSC.CS3BCR.lword == CS3BCR_default_CG10_20 &&
|
||||
BSC.CS3WCR.lword == CS3WCR_default_CG10_20 && BSC.CS5ABCR.lword == CS5aBCR_default_CG10_20 && BSC.CS5AWCR.lword == CS5aWCR_default_CG10_20 ) return OC_PtuneF4;
|
||||
|
||||
// OC_PtuneF5 configuration
|
||||
else if (CPG.FLLFRQ.lword == 0x00004000+900 && CPG.FRQCR.lword == (PLL_26x<<24)+(DIV_2<<20)+(DIV_4<<12)+(DIV_4<<8)+DIV16 && BSC.CS0BCR.lword == 0x34900400 &&
|
||||
BSC.CS0WCR.lword == 0x000003C0 && BSC.CS2BCR.lword == 0x04903400 && BSC.CS2WCR.lword == 0x000402C0 && BSC.CS3BCR.lword == CS3BCR_default_CG10_20 &&
|
||||
BSC.CS3WCR.lword == CS3WCR_default_CG10_20 && BSC.CS5ABCR.lword == CS5aBCR_default_CG10_20 && BSC.CS5AWCR.lword == CS5aWCR_default_CG10_20) return OC_PtuneF5;
|
||||
|
||||
// Not recognized
|
||||
else return OC_Undefined;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
// return 0 if no need to change
|
||||
// return 1 if successful change
|
||||
// return -1 on error
|
||||
|
|
@ -271,6 +485,8 @@ int clock_overclock( overclock_level level )
|
|||
{
|
||||
uint32_t count=0;
|
||||
|
||||
if (level==OC_Undefined) return 0;
|
||||
|
||||
if(gint[HWCALC] == HWCALC_FXCG50 && current_clock_state!=level)
|
||||
{
|
||||
cpu_atomic_start();
|
||||
|
|
@ -279,11 +495,11 @@ int clock_overclock( overclock_level level )
|
|||
initPphi = getPphi_sh7305(); // we get the current P_Phi_f
|
||||
getInitialTimersParameters(); // we collect the current TCNT and TCOR
|
||||
|
||||
if (level == OC_Default && current_clock_state!=OC_Default) SetOCDefault(), current_clock_state= OC_Default, overclock_config_changed=true;
|
||||
if (level == OC_PtuneF2 && current_clock_state!=OC_PtuneF2) SetOCPtuneF2(), current_clock_state= OC_PtuneF2, overclock_config_changed=true;
|
||||
if (level == OC_PtuneF3 && current_clock_state!=OC_PtuneF3) SetOCPtuneF3(), current_clock_state= OC_PtuneF3, overclock_config_changed=true;
|
||||
if (level == OC_PtuneF4 && current_clock_state!=OC_PtuneF4) SetOCPtuneF4(), current_clock_state= OC_PtuneF4, overclock_config_changed=true;
|
||||
if (level == OC_PtuneF5 && current_clock_state!=OC_PtuneF5) SetOCPtuneF5(), current_clock_state= OC_PtuneF5, overclock_config_changed=true;
|
||||
if (level == OC_Default && current_clock_state!=OC_Default) SetOCDefault_CG50(), current_clock_state= OC_Default, overclock_config_changed=true;
|
||||
if (level == OC_PtuneF2 && current_clock_state!=OC_PtuneF2) SetOCPtuneF2_CG50(), current_clock_state= OC_PtuneF2, overclock_config_changed=true;
|
||||
if (level == OC_PtuneF3 && current_clock_state!=OC_PtuneF3) SetOCPtuneF3_CG50(), current_clock_state= OC_PtuneF3, overclock_config_changed=true;
|
||||
if (level == OC_PtuneF4 && current_clock_state!=OC_PtuneF4) SetOCPtuneF4_CG50(), current_clock_state= OC_PtuneF4, overclock_config_changed=true;
|
||||
if (level == OC_PtuneF5 && current_clock_state!=OC_PtuneF5) SetOCPtuneF5_CG50(), current_clock_state= OC_PtuneF5, overclock_config_changed=true;
|
||||
|
||||
newPphi = getPphi_sh7305(); // we get the new P_Phi_f after OC
|
||||
computeNewTimersParameters( initPphi, newPphi ); // we compute the new TCNT and TCOR as per the new frequency
|
||||
|
|
@ -295,5 +511,32 @@ int clock_overclock( overclock_level level )
|
|||
|
||||
return 1;
|
||||
}
|
||||
else if(gint[HWCALC] == HWCALC_PRIZM && current_clock_state!=level)
|
||||
{
|
||||
cpu_atomic_start();
|
||||
|
||||
listTimerStatus(); // we list the running timers
|
||||
initPphi = getPphi_sh7305(); // we get the current P_Phi_f
|
||||
getInitialTimersParameters(); // we collect the current TCNT and TCOR
|
||||
|
||||
if (level == OC_Default && current_clock_state!=OC_Default) SetOCDefault_CG10_20(), current_clock_state= OC_Default, overclock_config_changed=true;
|
||||
if (level == OC_PtuneF2 && current_clock_state!=OC_PtuneF2) SetOCPtuneF2_CG10_20(), current_clock_state= OC_PtuneF2, overclock_config_changed=true;
|
||||
if (level == OC_PtuneF3 && current_clock_state!=OC_PtuneF3) SetOCPtuneF3_CG10_20(), current_clock_state= OC_PtuneF3, overclock_config_changed=true;
|
||||
if (level == OC_PtuneF4 && current_clock_state!=OC_PtuneF4) SetOCPtuneF4_CG10_20(), current_clock_state= OC_PtuneF4, overclock_config_changed=true;
|
||||
if (level == OC_PtuneF5 && current_clock_state!=OC_PtuneF5) SetOCPtuneF5_CG10_20(), current_clock_state= OC_PtuneF5, overclock_config_changed=true;
|
||||
|
||||
newPphi = getPphi_sh7305(); // we get the new P_Phi_f after OC
|
||||
computeNewTimersParameters( initPphi, newPphi ); // we compute the new TCNT and TCOR as per the new frequency
|
||||
updateNewTimersParameters(); // we adjust the timers accordingly
|
||||
|
||||
cpu_atomic_end();
|
||||
|
||||
cpg_compute_freq();
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
||||
|
||||
else return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -8,6 +8,7 @@ extern "C" {
|
|||
|
||||
typedef enum
|
||||
{
|
||||
OC_Undefined = -1, // Mode not recognized as a PTune/FTune configuration (i.e. certainly a user-defined mode)
|
||||
OC_Default = 0, // Default (118MHz)
|
||||
OC_PtuneF2 = 1, // 59MHz
|
||||
OC_PtuneF3 = 2, // 96MHz
|
||||
|
|
@ -22,6 +23,7 @@ typedef enum
|
|||
|
||||
int clock_overclock( overclock_level level );
|
||||
|
||||
overclock_level overclock_detect( void );
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
|
|
|||
19
src/main.cc
19
src/main.cc
|
|
@ -36,7 +36,7 @@
|
|||
#define DEBUGXXX 0
|
||||
#define OVERCLCK_ACTIVABLE 1
|
||||
|
||||
char version[5] = {'V','1','.','0','6'};
|
||||
char version[5] = {'V','1','.','0','7'};
|
||||
|
||||
|
||||
extern bopti_image_t player;
|
||||
|
|
@ -136,6 +136,7 @@ int lastindex=0;
|
|||
int CC=0; // current curve
|
||||
int CS=0;
|
||||
|
||||
overclock_level EntryLevel;
|
||||
|
||||
|
||||
void initEverything( void )
|
||||
|
|
@ -398,9 +399,11 @@ int main(void)
|
|||
bool canWeAllocate3Mb = false;
|
||||
|
||||
#if (OVERCLCK_ACTIVABLE==1)
|
||||
//Check if we can overclock i.e. if we have a CG50/Graph 90+E
|
||||
if (gint[HWCALC] == HWCALC_FXCG50)
|
||||
if (gint[HWCALC] == HWCALC_FXCG50 || gint[HWCALC] == HWCALC_PRIZM)
|
||||
{
|
||||
EntryLevel = overclock_detect();
|
||||
isOCPossible = true;
|
||||
}
|
||||
else
|
||||
isOCPossible = false;
|
||||
#endif
|
||||
|
|
@ -527,8 +530,9 @@ int main(void)
|
|||
|
||||
gint_world_switch( GINT_CALL( saveparameters ) );
|
||||
|
||||
if (gint[HWCALC] == HWCALC_FXCG50 && isOCActivated == true) clock_overclock( OC_PtuneF5 );
|
||||
else if (gint[HWCALC] == HWCALC_FXCG50 && isOCActivated == false) clock_overclock( OC_Default );
|
||||
if ((gint[HWCALC] == HWCALC_FXCG50 || gint[HWCALC] == HWCALC_PRIZM) && isOCActivated == true) clock_overclock( OC_PtuneF5 );
|
||||
else if ((gint[HWCALC] == HWCALC_FXCG50 || gint[HWCALC] == HWCALC_PRIZM) && isOCActivated == false && EntryLevel != OC_Undefined) clock_overclock( EntryLevel );
|
||||
else if ((gint[HWCALC] == HWCALC_FXCG50 || gint[HWCALC] == HWCALC_PRIZM) && isOCActivated == false && EntryLevel == OC_Undefined) clock_overclock( OC_Default );
|
||||
}
|
||||
else if (mode==3)
|
||||
{
|
||||
|
|
@ -1169,7 +1173,7 @@ int main(void)
|
|||
|
||||
dimage( 198-bigflag.width/2, 112-bigflag.height/2, &bigflag );
|
||||
|
||||
if (ranking!=-1)
|
||||
if (ranking!=-1 || mode==0)
|
||||
{
|
||||
|
||||
dfont(&startseq);
|
||||
|
|
@ -1371,7 +1375,8 @@ int main(void)
|
|||
usb_close();
|
||||
#endif
|
||||
|
||||
if (gint[HWCALC] == HWCALC_FXCG50 && isOCActivated == true) clock_overclock( OC_Default );
|
||||
if ((gint[HWCALC] == HWCALC_FXCG50 || gint[HWCALC] == HWCALC_PRIZM) && isOCActivated == true && EntryLevel != OC_Undefined) clock_overclock( EntryLevel );
|
||||
else if ((gint[HWCALC] == HWCALC_FXCG50 || gint[HWCALC] == HWCALC_PRIZM) && isOCActivated == true && EntryLevel == OC_Undefined) clock_overclock( OC_Default );
|
||||
|
||||
|
||||
delete cam;
|
||||
|
|
|
|||
Loading…
Reference in New Issue