Commit Graph

30 Commits

Author SHA1 Message Date
Lephe c37f150600
use GINT_CALL() in every API that has callbacks
* Change gint_inth_callback()
* Add intc_handler_function() to use C functions as handlers instead of
  writing assembler, and use it in the RTC and USB

* Revisit the TMU handlers, which after moving out the callbacks, now
  fit into 3 gates (great!), and adapt the ETMU handler
* Improve the timer driver (less code = better code, removed magic
  constants assuming the VBR layout on SH3/SH4, etc.)
* Remove 2 gates and a gap from the compact scheme on SH3

* Define timer_configure() to replace timer_setup(), which could not be
  cleanly updated to support GINT_CALL()
* Replace rtc_start/stop_timer with rtc_periodic_enable/disable, which
  is less confusing because of ETMU being "RTC timers"
2021-04-27 14:29:38 +02:00
Lephe c9264a06d5
kernel: driver and world system overhaul
Changes in the driver and world system:

* Rewrite driver logic to include more advanced concepts. The notion of
  binding a driver to a device is introduced to formalize wait(); power
  management is now built-in instead of being handled by the drivers
  (for instance DMA). The new driver model is described in great detail
  in <gint/drivers.h>

* Formalized the concept of "world switch" where the hardware state is
  saved and later restored. As a tool, the world switch turns out to be
  very stable, and allows a lot of hardware manipulation that would be
  edgy at best when running in the OS world.

* Added a GINT_DRV_SHARED flag for drivers to specify that their state
  is shared between worlds and not saved/restored. This has a couple of
  uses.

* Exposed a lot more of the internal driver/world system as their is no
  particular downside to it. This includes stuff in <gint/drivers.h>
  and the driver's state structures in <gint/drivers/states.h>. This is
  useful for debugging and for cracked concepts, but there is no
  API stability guarantee.

* Added a more flexible driver level system that allows any 2-digit
  level to be used.

Feature changes:

* Added a CPU driver that provides the VBR change as its state save.
  Because the whole context switch relied on interrupts being disabled
  anyway, there is no longer an inversion of control when setting the
  VBR; this is just part of the CPU driver's configuration. The CPU
  driver may also support other features such as XYRAM block transfer
  in the future.

* Moved gint_inthandler() to the INTC driver under the name
  intc_handler(), pairing up again with intc_priority().

* Added a reentrant atomic lock based on the test-and-set primitive.
  Interrupts are disabled with IMASK=15 for the duration of atomic
  operations.

* Enabled the DMA driver on SH7305-based fx-9860G. The DMA provides
  little benefit on this platform because the RAM is generally faster
  and buffers are ultimately small. The DMA is still not available on
  SH3-based fx-9860G models.

* Solved an extremely obnoxious bug in timer_spin_wait() where the
  timer is not freed, causing the callback to be called when interrupts
  are re-enabled. This increments a random value on the stack. As a
  consequence of the change, removed the long delays in the USB driver
  since they are not actually needed.

Minor changes:

* Deprecated some of the elements in <gint/hardware.h>. There really is
  no good way to "enumerate" devices yet.

* Deprecated gint_switch() in favor of a new function
  gint_world_switch() which uses the GINT_CALL abstraction.

* Made the fx-9860G VRAM 32-aligned so that it can be used for tests
  with the DMA.

Some features of the driver and world systems have not been implemented
yet, but may be in the future:

* Some driver flags should be per-world in order to create multiple
  gint worlds. This would be useful in Yatis' hypervisor.
* A GINT_DRV_LAZY flag would be useful for drivers that don't want to
  be started up automatically during a world switch. This is relevant
  for drivers that have a slow start/stop sequence. However, this is
  tricky to do correctly as it requires dynamic start/stop and also
  tracking which world the current hardware state belongs to.
2021-04-23 20:44:08 +02:00
Lephe 8ff7d89d33
cpg, tmu: add spin waiting and spin delay functions for drivers
This change adds a new TMU function timer_spinwait() which waits for a
timer to raise its UNF flag. This makes it possible to wait even when
interrupts are disabled.

This is used by the new CPG function sleep_us_spin() which waits for a
given delay without using interrupts. This is currently used in SPU
initialization.
2020-10-21 14:49:34 +02:00
Lephe e5abe03b89
kernel: dynamic loading of GMAPPED functions to user RAM
This commit introduces a large architectural change. Unlike previous
models of the fx-9860G series, the G-III models have a new user RAM
address different from 8801c000. The purpose of this change is to
dynamically load GMAPPED functions to this address by querying the TLB,
and call them through a function pointer whose address is determined
when loading.

Because of the overhead of using a function pointer in both assembly and
C code, changes have been made to avoid GMAPPED functions altogether.
Current, only cpu_setVBR() and gint_inth_callback() are left, the second
being used specifically to enable TLB misses when needed.

* Add a .gint.mappedrel section for the function pointers holding
  addresses to GMAPPED functions; add function pointers for
  cpu_setVBR() and gint_inth_callback()
* Move rram to address 0 instead of the hardcoded 0x8801c000
* Load GMAPPED functions at their linked address + the physical address
  user RAM is mapped, to and compute their function pointers
* Remove the GMAPPED macro since no user function needs it anymore
* Add section flags "ax" (code) or "aw" (data) to every custom .section
  in assembler code, as they default to unpredictable values that can
  cause the section to be marked NOLOAD by the linker
* Update the main kernel, TMU, ETMU and RTC interrupt handlers to use
  the new indirect calling method

This is made possible by new MMU functions giving direct access to the
physical area behind any virtualized page.

* Add an mmu_translate() function to query the TLB
* Add an mmu_uram() function to access user RAM from P1

The exception catching mechanism has been modified to avoid the use of
GMAPPED functions altogether.

* Set SR.BL=0 and SR.IMASK=15 before calling exception catchers
* Move gint_exc_skip() to normal text ROM
* Also fix registers not being popped off the stack before a panic

The timer drivers have also been modified to avoid GMAPPED functions.

* Invoke timer_stop() through gint_inth_callback() and move it to ROM
* Move and expand the ETMU driver to span 3 blocks at 0xd00 (ETMU4)
* Remove the timer_clear() function by inlining it into the ETMU handler
  (TCR is provided within the storage block of each timer)
* Also split src/timer/inth.s into src/timer/inth-{tmu,etmu}.s

Additionally, VBR addresses are now determined at runtime to further
reduce hardcoded memory layout addresses in the linker script.

* Determine fx-9860G VBR addresses dynamically from mmu_uram()
* Determine fx-CG 50 VBR addresses dynamically from mmu_uram()
* Remove linker symbols for VBR addresses

Comments and documentation have been updated throughout the code to
reflect the changes.
2020-09-17 14:48:54 +02:00
Lephe 2751dcf045
remove the .gint.data section
Since both platforms now have their VBR and gint-specific data loaded
along the add-in's data, the .gint.data section is entirely unused.

The .gint.bss section is still used for uninitialized objects (it has
different semantics than .bss which is initially cleared) and the
.gint.data.sh3 and .gint.bss.sh3 sections that are dropped on the
SH4-only fx-CG 50 are also still used.
2020-07-10 16:36:05 +02:00
Lephe ece65927f0
use less static RAM to improve SH3 support 2020-07-10 16:06:33 +02:00
Lephe 0aceb6f93e
kernel: compact VBR even more on SH3
This change moves interrupt handler from VBR + 0x640 to VBR + 0x200, in
the gap between the exception and TLB miss handlers.

This new scheme is not limited to VBR+0x200 .. VBR+0x400 as new large
block numbers can be used to jump over the TLB miss handler and the
interrupt handler entry points.
2020-07-10 13:07:12 +02:00
Lephe 2b1f408cb4
kernel: compact VBR scheme on SH3
I have recenty discovered that the so-called "rram" section used by gint
to store its VBR space and a couple memory structures gets overwritten
when returning to the main menu. It is thus necessary to get rid of it
and store that data somewhere else.

My current lead is to have it at the start of the static RAM by querying
its address in the TLB. However, the static RAM is very small on SH3
(8k) so the VBR must be made more compact.

This change elaborates the event code translation scheme used on SH3 to
emulate SH4 event codes. It is now used to translate the event codes to
a gint-specific VBR layout that leaves no gaps and thus reduces the size
of the VBR space. The gint_inthandler() method has to be modified for
every new SH3 interrupt to maintain this scheme.
2020-07-09 10:44:37 +02:00
Lephe 03715344a4
tmu: safer restore order
The previous setup made it possible for TCNT to underflow to an
uncontroller value of TCOR during the restore.
2020-07-08 19:49:09 +02:00
Lephe dc83d5ee1f
timer: final iteration on the API
This commit minimally changes the signature of timer_setup() to greatly
simplify timer management, allowing to user to let the library choose
available timers dynamically depending on the settings.
2020-06-20 22:45:46 +02:00
Lephe a91a0a483b
core: remove some useless hardware info 2020-06-20 19:23:50 +02:00
Lephe 1c7b1350b4
general cleanup of the kernel
* Removed .pretext sections since the TLB is now entirely dynamic; left
  only .text.entry for the start symbol.
* Reworked the main files of src/core to move the INTC to its own driver
  and let the kernel handle only VBR space and CPU (now: VBR & CPUOPM).
* Moved src/core/gint.c to src/core/kernel.c and centralized all driver
  loops that save or restore context for more robustness. This leaves
  the callbacks of cpu_setVBR() (formerly gint_setvbr()) pretty short.
* Coalesced gint_switch_out() and gint_switch_in() into a single
  function callback for cpu_setVBR().
* Added an abstraction of interrupt signals as an enumerated value so
  that drivers no longer hardcode the IPR and IMR numbers and bits,
  sometimes even with isSH3() due to differences in the SH7705.
* Changed the interrupt blocking method in cpu_setVBR() from SR.BL=1 to
  SR.IMASK=15 so that TLB misses are still handled. This removes the
  need for callback functions to be GMAPPED.
* Moved gint_osmenu() and its utilities to a new file src/core/osmenu.c.
2020-06-20 17:18:51 +02:00
Lephe de4881244e
core: remove bootlog
An unused logging mechanism that was never really fit for its task of
diagnosing boot issues. Disappears with cleanup...
2020-06-20 09:46:39 +02:00
Lephe 9cf2f9fe97
core tmu: improve reliability of interrupt handlers
This change includes three reliability improvements in handlers:

1. TMU handlers now actively check for the UNF flag to go low rather
   than expecting it to do so right away.
2. CPUOPM.INTMU is now set so that IMASK it updated at every interrupt
   (which is absolutely required for nested interrupts!).
3. gint_inth_callback() no longer performs transfers between user bank
   and kernel bank while in user bank, because this is when interrupts
   are enabled and thus likely to corrupt the kernel bank; rather, it
   now does it while in kernel bank with interrupts disabled.
2020-06-20 09:32:48 +02:00
Lephe bf2d407f1d
tmu: fix dreadful omission of timer ID in ETMU handler
This change fixes a never-should-have-worked problem where the ETMU
interrupt handler loses track of the timer ID before attempting to call
timer_stop(), resulting in complete nonsense.

And also a similar problem in timer_wait().
2020-06-18 20:20:55 +02:00
Lephe 2fd4238d31
core: finalize TLB management in timer callbacks (STABLE)
This change enables interrupts within timer callbacks, making it
possible to load pages to MMU while handling a timer underflow. The call
to TLB_LoadPTEH() has been moved directly into the VBR handler to avoid
jumping to ILRAM for a short call on SH4.

The TMU and ETMU handlers have been changed to callback through a new
function gint_inth_callback() that saves the user bank and a few
registers, then invokes the callback with interrupts enabled and in user
bank; until now, callbacks were invoked with interrupts disabled and in
kernel bank. Note that IMASK is still set so a callback can only be
interrupted by a high-priority interrupt.

A timer_wait() function has also been added to simplify tests that
involve timers. Finally, the priority level of the TMU0 underflow
interrupt has been set to 13 (as per the comments) instead of 7.

This version is the first stable version that handles TLB misses
transparently for large add-ins. It is suitable for every gint
application.
2020-06-17 11:43:26 +02:00
Lephe d8886c7dbf
core: answer TLB misses and remove startup mapping (UNSTABLE)
This change adds a TLB miss handler that calls __TLB_LoadPTEH() and
removes the startu mapping of add-in pages in the explore() routine of
src/core/start.c.

Note that calling __TLB_LoadPTEH() manually might unexpectedly lead to a
TLB multihit problem as the requested page might be accidentally loaded
by a TLB miss in the code that loads it. A TLB multihit is a platform
reset, so this function should always be considered unsafe to call
(unless the calling code is in a combination of P1 space and ILRAM).

This change also moves a lot of functions out of the .pretext section,
notably topti, as this was designed to allow panic messages when the
add-in couldn't be mapped entirely. By contrast, a GMAPPED macro has
been defined to mark crucial kernel code and data that must remain
mapped at all times. This currently puts the data in ILRAM because
static RAM is not executable. An alternative will have to be found for
SH3-based fx9860g machines.

This version still does not allow TLB misses in timer callbacks and
breaks return-to-menu in a severe way! It is not suitable for any
stable application!
2020-06-14 18:22:20 +02:00
Lephe 85311a0b31
drivers: update the model, replacing unload() with wait()
The unload() function is not very relevant for drivers because hardware
state is managed by ctx_save() and ctx_restore() and software state is
managed by underlying drivers when there are dependencies.

For now, it's been replaced with a wait() function that allows drivers
to not be interrupted at any point. It is currently used by the DMA to
wait for ongoing transfers to finish before disabling interrupts (which
would prevent the transfer end from being detected) and switching in and
out of gint.
2020-05-10 16:36:21 +02:00
Lephe 4485e7f865
core, tmu: add gint_switch(), return to menu, and improve timer code
* Add the gint_switch() function which executes user-provided code from
  the system (CASIOWIN) context.
* Added interrupt masks to the core context (should have been there long
  ago).
* Added the gint_osmenu() function that switches out of gint to invoke
  GetKeyWait() and inject KEY_CTRL_MENU to trigger the main menu. This
  uses many CASIOWIN syscalls, but we don't care because gint is unloaded.
  Trickery is used to catch the key following the return in the add-in
  and/or display a new application frame before GetKeyWait() even finishes
  after coming back. This is only available on fx9860g for now.
* Removed any public syscall definition to clear up interfaces.
* Patched the DMA interruption problem in a weird way on fxcg50, a
  driver function will be used to do that properly eventually.
* Changed the driver model to save driver contexts in preallocated
  spaces instead of on the stack for overall less risk.
* Enabled return-to-menu with the MENU key on fx9860g in getkey().
* Changed the keyboard driver to emit releases before presses, as a
  return-to-menu acts as a press+release of different keys in a single
  driver frame, which confuses getkey().
* Fixed a really stupid bug in memcpy() that made the function really
  not work.

Improvements in the timer driver:

* Expose ETMU modules as SH7705_TMU and SH7305_TMU in <gint/mpu/tmu.h>.
* Remove the timer_t structures, using SH*_ETMU and SH*_TMU instead.
  Only interrupt gate entries are left hardcoded.
* Discovered that not only every write to the TCNT or TCR of an ETMU
  takes about 1/32k of a second (hinting at registers being powered by
  the same clock as the timer), but every write occuring while a previous
  write is pending is *lost*. This led to terrible bugs when switching
  ETMU contexts too fast in gint_switch().
* Removed an internal timer_address() function.
* Overall simplified the handling of timers and the initialization step.
2020-05-10 14:03:41 +02:00
Lephe 2cdf925f94
interrupts: save caller-saved registers in main handler
This is an obvious requirement for the interrupt routine, which was
forgotten and only surfaced when I used a timer callback started with
multiplications in an innocent add-in. r0..r7 are saved automatically,
which leaves pr, gbr, mach et macl susceptible to corruption by the
interrupt handler.
2020-05-06 20:45:35 +02:00
Lephe 61da7debc8
code review and display driver changes
t6k11: use the gint array for variant detection
r61524: use true triple buffering by default
display: define DWIDTH and DHEIGHT
display: add C_RGB(r,g,b) (0 ≤ r,g,b ≤ 31) [fxcg50]
2020-02-23 16:05:25 +01:00
lephe 1697998a9c tmu: improve code style and clear masks
Apparently there are some situations where the interrupt masks for
TMU0 are set in the system. They should obviously be cleared.
2019-07-18 15:19:29 -04:00
lephe 31ade70c42 tmu: export definitions, clean stop, expose address
This commit introduces three timer driver changes:

* Export the definitions of the timer structures to a detailed header at
  <gint/mpu/tmu.h>, and re-use them in the driver.
  This integration is still limited as the driver keeps its own address
  definitions and event codes.

* Clean the timer stop routine that is used in the interrupt handler. Up
  until now the interrupt handler would only stop TSTR, which is not
  enough to cleanly leave the timer (need TCOR=TCNT=-1) and is not even
  sound with respect to gint's semantics as UNIE stays enabled so the
  timer is not made available again.

  The interrupt handler now calls into C code when the timer stop
  condition is met (callback returns non-zero) to keep this clean. This
  unsurprisingly solves problems that occurred in certain situations
  when a timer was used repeatedly.

* Expose timer addresses using a timer_address() function, compensating
  for the lack of address definitions in <gint/mpu/tmu.h>. This
  interface is likely to evolve in the future to better integrate the
  address in the MPU headers and move them out of the driver.
2019-07-16 15:39:38 -04:00
lephe be415fb4b3 rename 'clock' module 'cpg' and move sleep_us() to tmu 2019-07-06 16:51:31 -04:00
lephe 3324d58afa core: add a hardware detection interface 2019-07-04 12:11:43 -04:00
lephe 04231ea5d6 dma: add a new driver to support r61524
Also add a power interface (without driving code) and switch toolchain
because the previous sh4eb-nofpu-elf toolchain was not completely
FPU-free.
2019-03-10 15:45:34 +01:00
lephe f33cb3cf80 core: better bootlog API and implementation
* Now uses topti instead of fxlib for text (including MMU failure)
* Fit .pretext into 4k for everything before MMU succeeds
* A short version of sprintf() for dynamic messages
* Support a driver function, status(), to allow early driver debug
* Expose more useful platform information in <gint/mpu.h>
* Expose the first of a few CASIOWIN syscalls
2019-03-06 14:32:51 +01:00
lephe 3f7c0a04ad way too much, including bopti/topti, timers, and more. 2019-02-21 21:00:26 +01:00
lephe 298338f633 More timers, RTC, basic overclock-resistant keyboard, CPG, PFC, driver levels. 2018-08-19 17:11:37 +02:00
lephe 2f0e049c33 More interrupt system, exceptions, timers. 2018-08-01 20:41:36 +02:00