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Overclock support for all SH3 and SH4 calculators supported by Gint/fxSDk : Fx9860Gs and fxCGs #23

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Slyvtt wants to merge 16 commits from Slyvtt/gint:dev into dev
pull from: Slyvtt/gint:dev
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Slyvtt commented 2022-12-05 22:24:00 +01:00
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Addition of fx-9860GII and GII-2/G35+EII SH4 based parameters in overclock functions.

Refactored the code (removed #ifdef FXCG50) and added escape on !isSH4() within functions in order to be able to handle SH3 based calculators (not done yet).

Settings are coming from FTune2 for fx-9860GII and from FTune3 for fx-9860GII-2/G35+EII.

A double check of all setting values would be highly welcomed.

Not tested yet cause no calculators with me ... handle with care :D

SH3 based to come soon.

Addition of fx-9860GII and GII-2/G35+EII SH4 based parameters in overclock functions. Refactored the code (removed #ifdef FXCG50) and added escape on !isSH4() within functions in order to be able to handle SH3 based calculators (not done yet). Settings are coming from FTune2 for fx-9860GII and from FTune3 for fx-9860GII-2/G35+EII. A double check of all setting values would be highly welcomed. Not tested yet cause no calculators with me ... handle with care :D SH3 based to come soon.
Slyvtt added 4 commits 2022-12-05 22:24:02 +01:00
Slyvtt added 1 commit 2022-12-06 09:03:19 +01:00
Slyvtt added 1 commit 2022-12-06 09:27:18 +01:00
Slyvtt commented 2022-12-06 09:51:55 +01:00
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Added today the first part of OC for SH3 MPUs.

Configurations names have been changed for clarity.

in cpg/overclock.c:

added #defines for CPGSH3, WDTSH3 and BSCSH3 added #defines for DIVs/PLLs for both SH3 and SH4 (bit configuration is not the same between both MPUs)

clock_set_speed() is unchanged yet, not sure it work with SH3 MPUs

clock_get_speed() changed for SH3 support (one register is missing and one is uint16_t instead of uint32_t)

right now it compiles, need to be tested with real hardware.

Added today the first part of OC for SH3 MPUs. Configurations names have been changed for clarity. in cpg/overclock.c: added #defines for CPGSH3, WDTSH3 and BSCSH3 added #defines for DIVs/PLLs for both SH3 and SH4 (bit configuration is not the same between both MPUs) clock_set_speed() is unchanged yet, not sure it work with SH3 MPUs clock_get_speed() changed for SH3 support (one register is missing and one is uint16_t instead of uint32_t) right now it compiles, need to be tested with real hardware.
Slyvtt added 1 commit 2022-12-06 13:38:03 +01:00
Slyvtt commented 2022-12-06 14:03:24 +01:00
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Made some tests on several SH4 and SH3 calculators.

All SH4 (CG50 (ie Graph 90 in my case) / CG10/20 (ie CG20 in my case) and G35+EII) are working great.

Only G35+ SH4 based are not tested.

For SH3, the CPU is correctly accelerated. Timers frequency is not adjusted so sleep_ms functions are not waiting the right amount of time (ex: when CPU is OCed x4, sleep_ms( 10000 ) actually waits only 2.5s.

cannot find the reason of such inconsistency, should be handle by functions sh_probe within cpg.c.

if you can have a look Lephe, that would be really great.

Made some tests on several SH4 and SH3 calculators. All SH4 (CG50 (ie Graph 90 in my case) / CG10/20 (ie CG20 in my case) and G35+EII) are working great. Only G35+ SH4 based are not tested. For SH3, the CPU is correctly accelerated. Timers frequency is not adjusted so sleep_ms functions are not waiting the right amount of time (ex: when CPU is OCed x4, sleep_ms( 10000 ) actually waits only 2.5s. cannot find the reason of such inconsistency, should be handle by functions sh_probe within cpg.c. if you can have a look Lephe, that would be really great.
Slyvtt added 1 commit 2022-12-06 17:45:48 +01:00
Slyvtt added 1 commit 2022-12-06 18:49:04 +01:00
Slyvtt added 1 commit 2022-12-07 08:20:28 +01:00
Slyvtt added 2 commits 2022-12-07 11:42:25 +01:00
a5db18902f Revert "Added" 
This reverts commit 3815cefe39.
Slyvtt added 1 commit 2022-12-07 22:34:05 +01:00
Slyvtt commented 2022-12-07 22:36:57 +01:00
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Corrected the calculation method of frequencies Pphi_f and Iphi_f for SH3 into sh7705_probe() within cpg.c.

now OC is working and timers are correctly ajusted to accomodate the frequency change.

I let you review and if possible test on FX9860G_SH4 architecture cause I haven't got one.

Cheers ...

Corrected the calculation method of frequencies Pphi_f and Iphi_f for SH3 into sh7705_probe() within cpg.c. now OC is working and timers are correctly ajusted to accomodate the frequency change. I let you review and if possible test on FX9860G_SH4 architecture cause I haven't got one. Cheers ...
Slyvtt changed title from WIP : Addition of fx-9860GII and GII-2/G35+EII SH4 based parameters in overclock functions to Overclock support for all SH3 and SH4 calculators supported by Gint/fxSDk : Fx9860Gs and fxCGs 2022-12-08 07:45:40 +01:00
Slyvtt commented 2022-12-08 07:46:09 +01:00
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Changed title to reflect correct progress.

Changed title to reflect correct progress.
Slyvtt added 1 commit 2022-12-08 21:16:22 +01:00
Slyvtt added 1 commit 2022-12-08 22:03:14 +01:00
Slyvtt added 1 commit 2023-01-04 20:50:31 +01:00
Lephenixnoir commented 2023-01-05 20:05:40 +01:00
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That's now merged (by hand). Your dev branch should have been fully merged by now so consider resetting it to the upstream dev branch so you can start again clean.

That's now merged (by hand). Your `dev` branch should have been fully merged by now so consider resetting it to the upstream `dev` branch so you can start again clean.
Lephenixnoir closed this pull request 2023-01-05 20:05:40 +01:00
Slyvtt deleted branch dev 2023-01-05 20:10:40 +01:00
Slyvtt commented 2023-01-05 20:11:56 +01:00
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Perfect, thanks Lephe. Will try to upgrade cleanliness of my PR for next proposals :D Good job Man !!

Perfect, thanks Lephe. Will try to upgrade cleanliness of my PR for next proposals :D Good job Man !!

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